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Staff Analog IC Layout Engineer

 

Elevate Semiconductor is at the forefront of shaping the future of semiconductor technology, driving innovation to enable the next generation of testing. We deliver comprehensive solutions that streamline semiconductor testing, empowering faster time-to-market and enhanced capabilities. Our diverse product portfolio includes standard, semi-custom, and custom SKUs, all engineered for longevity and compatibility across evolving technological advancements. By focusing on low-power, high-density designs, we aim to lower the cost of testing while exceeding expectations on every project.

Join us in advancing the cutting edge of semiconductor innovation!

The Position

We are seeking a highly skilled Senior Analog Layout Engineer to join our team in developing state-of-the-art integrated circuits (ICs). In this role, you will handle the physical layout and verification of highly complex, high-voltage, and mixed-signal solutions using advanced process technologies, ranging from 65nm CMOS to 100+V BCD. You will collaborate with a cross-functional team to optimize silicon design, leveraging mentorship and support from senior engineers to deliver innovative and cost-effective solutions.

Must be able to work onsite in San Diego,C CA.

Responsibilities

As the sole Layout Design Engineer in the organization, you will take full ownership of physical layout activities from block-level to full-chip integration. Your responsibilities will include:

  • Performing physical layout of analog and mixed-signal integrated circuits at the block and chip level
  • Conducting floorplanning and placement of circuit components to optimize area, performance, and power
  • Verifying layouts using industry-standard tools for LVS (Layout vs. Schematic) and DRC (Design Rule Checking) to ensure compliance with process design rules
  • Collaborating closely with design engineers to understand circuit specifications and ensure layout accuracy
  • Working with cross-functional teams, including digital design and packaging, to optimize overall chip performance
  • Troubleshooting and resolving issues related to layout verification and manufacturing
  • Bachelor’s degree in Electrical Engineering or a related field
  • Minimum of 8 years of professional experience in analog and mixed-signal IC layout design
  • Strong knowledge of analog CMOS circuits and device physics fundamentals
  • Solid understanding of the IC design, qualification, and manufacturing lifecycle
  • Hands-on experience with industry-standard EDA tools for analog and mixed-signal design (e.g., Cadence, Mentor Graphics, Tanner)
  • Proficiency in performing LVS and DRC verification using Cadence or Mentor tools

Preferences

  • Layout experience with STI High voltage (100V+) BCD and LDMOS processes
  • Layout experience with mixed voltage (multiple supply rails, 6 or more) domains
  • Layout experience with high speed multi Gbps circuits.
  • Layout experience in ultra-high accuracy and precision circuits.
  • Layout experience with high resolution data converters.
  • Layout experience with BiCMOS process technology.
  • Programming and scripting ability a strong plus, particularly in SKILL and Calibre scripts

Why Join Us?

At Elevate Semiconductor, you’ll be part of a dynamic team working on innovative technologies that shape the future of the semiconductor industry. We offer competitive compensation, comprehensive benefits, and opportunities for professional growth in a collaborative environment.

Apply Today!

If you are passionate about digital design and eager to contribute to groundbreaking semiconductor solutions, we want to hear from you!

  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

Average salary estimate

$135000 / YEARLY (est.)
min
max
$120000K
$150000K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

What You Should Know About Staff Analog IC Layout Engineer, Elevate Semiconductor

Elevate Semiconductor is seeking a talented Staff Analog IC Layout Engineer to be part of our dynamic team dedicated to transforming semiconductor technology and enhancing testing solutions. In this exciting role, you'll dive into the world of integrated circuits (ICs), focusing on complex, high-voltage, and mixed-signal designs using cutting-edge process technologies ranging from 65nm CMOS to BCD over 100V. Your expertise will steer the physical layout and verification of these challenging solutions, where you'll work closely with a collaborative group of professionals to push the boundaries of silicon design. As the sole Layout Design Engineer, you will own every aspect of the layout process, from initial block-level layouts to full-chip integration, ensuring optimal performance, area efficiency, and power management. Join us in San Diego, CA, where your strong knowledge of analog CMOS circuits and hands-on experience with EDA tools like Cadence will play a crucial role in delivering top-tier projects. You'll be supported by a team of experienced engineers who are eager to share their wealth of knowledge while empowering you to solve layout-related challenges. Elevate Semiconductor offers a vibrant work environment, complete with competitive compensation and a stellar range of benefits, including health insurance, unlimited PTO, and opportunities for professional growth. If you’re ready to take your career to the next level as a Staff Analog IC Layout Engineer, we can’t wait to hear from you!

Frequently Asked Questions (FAQs) for Staff Analog IC Layout Engineer Role at Elevate Semiconductor
What are the main responsibilities of a Staff Analog IC Layout Engineer at Elevate Semiconductor?

As a Staff Analog IC Layout Engineer at Elevate Semiconductor, you will be responsible for performing the physical layout of analog and mixed-signal integrated circuits from block-level layouts to full-chip integration. Your role will involve optimizing area, performance, and power through careful floorplanning and placement of circuit components, as well as verifying layouts with industry-standard tools for LVS and DRC to ensure compliance with design rules.

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What qualifications are required for the Staff Analog IC Layout Engineer position at Elevate Semiconductor?

To qualify for the Staff Analog IC Layout Engineer position at Elevate Semiconductor, you will need a Bachelor’s degree in Electrical Engineering or a related field along with a minimum of 8 years of professional experience in analog and mixed-signal IC layout design. Strong knowledge of analog CMOS circuits, device physics fundamentals, and hands-on experience with EDA tools like Cadence or Mentor Graphics are essential qualifications for this role.

Join Rise to see the full answer
What tools do Staff Analog IC Layout Engineers at Elevate Semiconductor use?

Staff Analog IC Layout Engineers at Elevate Semiconductor typically utilize industry-standard EDA tools for analog and mixed-signal design, including Cadence, Mentor Graphics, and Tanner. Proficiency in performing LVS and DRC verification using these tools is also a key requirement for the role.

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What kind of work environment can I expect as a Staff Analog IC Layout Engineer at Elevate Semiconductor?

At Elevate Semiconductor, you can expect a collaborative and innovative work environment as a Staff Analog IC Layout Engineer. The culture emphasizes teamwork and mentorship, with opportunities for professional growth, competitive compensation, and comprehensive benefits, including health insurance and unlimited paid time off.

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What are the preferences sought for the Staff Analog IC Layout Engineer role at Elevate Semiconductor?

In addition to the required qualifications for the Staff Analog IC Layout Engineer role, Elevate Semiconductor prefers candidates with experience in layout for high-voltage (100V+), mixed voltage domains, high-speed circuits, ultra-high precision circuits, high-resolution data converters, and BiCMOS process technologies. Programming and scripting abilities, particularly in SKILL and Calibre scripts, are also a strong plus.

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Common Interview Questions for Staff Analog IC Layout Engineer
Can you describe your experience with LVS and DRC verification in analog IC layout design?

In your response, you should highlight specific tools you've used for LVS and DRC verification, such as Cadence or Mentor Graphics. Provide examples of complex layouts you've worked with, and discuss how you ensured compliance with design rules while meeting project goals.

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How do you approach floorplanning in mixed-signal circuit design?

When answering this question, emphasize your methodology for floorplanning, including how you consider factors such as performance, area efficiency, and power management. Discuss any successful projects where your floorplanning led to significant improvements.

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What challenges have you faced in layout verification, and how did you overcome them?

Share a specific challenge you've encountered during layout verification, detailing the issue and the steps you took to troubleshoot and resolve it. This response should showcase your problem-solving skills and ability to work collaboratively with the design team.

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Describe your experience working with cross-functional teams during the design process.

Illustrate your communication and collaboration skills by providing examples of successful projects where you worked with digital designers and packaging teams. Highlight how you contributed to optimizing overall chip performance.

Join Rise to see the full answer
What layout designs have you worked on that required special considerations for high-voltage circuits?

In this answer, discuss your experience with high-voltage design layouts, focusing on the specific considerations you needed to keep in mind, such as isolation, spacing, and device interactions. Provide examples of successful designs.

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How do you ensure accuracy in your analog IC layouts?

Talk about your meticulous approach to ensuring accuracy in layouts, including using best practices, checklists, and manual reviews. Mention how you validate the final designs against specifications.

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What role does mentorship play in your professional development as an Engineer?

Describe your experiences with mentorship, both as a mentor and a mentee. Discuss how mentorship has influenced your skills and career trajectory, and express your eagerness to continue this in a collaborative environment.

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How do you stay up-to-date with advancements in IC layout design technology?

To answer this question, mention the resources you use, such as seminars, webinars, technical papers, and professional networks. Illustrate how this continual learning has positively impacted your work.

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Can you explain the importance of programming/scripting in analog IC layout?

Highlight how programming and scripting improve efficiency and accuracy in IC layout design. Discuss any specific programming languages or scripting tools you've utilized and how they have streamlined your processes.

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What is your philosophy when it comes to integrating feedback from design engineers?

Emphasize the importance of open communication and collaboration. Discuss your strategies for receiving and integrating feedback into your layouts for both improved designs and team synergy.

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Founded in 2012, Elevate Semiconductor is the worldwide leader in the design and manufacturing of Automated Test Equipment (ATE) semiconductors for the automotive, Memory, LCD, Industry and IOT markets.

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Full-time, on-site
DATE POSTED
March 27, 2025

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