Job details

IC Design Verification Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Must possess excellent debug skills and have experience in developing System Verilog/UVM based testbenches and/or formal property based verification. Should have worked on time-bounded projects leading to Si realization.

Independently handle verification of complex modules or own significant piece in subsystem / SOC based verification. Define methodology for subsystem/SOC verification. Mentor less experienced engineers to bring them up as independent verification engineer. Follow systematic approach of metric driven verification with meticulous attention to quality and completeness. Should be able work closely across teams to meet delivery timelines.

Strong vocabulary, communication, organizational, planning, and presentation skills are essential. Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment. A strong positive attitude and ability to work in a team is a must. Self-motivated and willing take up additional responsibilities to contribute to team’s success.

Skills & Responsibilities:

Ability to understand microarchitectural specifications and RTL design logic
Worked on IP, Subsystem, or SOC level verification projects
Experience with ARM processor based designs
In-depth knowledge SV-UVM
Formal Verification experience is a plus
Ability to write synthesizable code
Any experience performing formal verification
Expertise in architecting, design, and development of scalable verification environments from scratch. Define verification architecture and verification strategy
Expertise in verification test plan development, test cases coding; Execute and debug test cases to achieve functional and code coverage goals
Experience in C based testcase development
Strong knowledge of AMBA protocols like AXI, ACE, APB, AHB.
Strong problem solving skills. Exhibit discipline, thoroughness and methodical approach in solving problems
Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers
Self-driven and committed individual who can work in a fast paced project environment
Prior experience with Cadence tools and flows is highly desirable including vManager, Xcelium, Jasper Gold, Palladium and Protium
Good knowledge of standard interface protocols like UART, I2C, SPI, JTAG

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