Senior Test Engineer

Organization & Role

Teradyne’s Silicon Technology Engineering group (STE) needs an Senior level ATE test engineer who supports new product development and is responsible for creating innovative test solutions to our state of the art custom design mixed signal ASICs. Candidates must have in depth knowledge on computer programming and expert level working knowledge of semiconductor devices.

Responsibilities

The role will involve direct communication with Teradyne’s semiconductor designers, internal customers, supply line management and operations groups as well as communication to Teradyne’s ASIC supply chain vendors.

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  Develop ATE test program for our complex mixed custom designed ASIC to be used in Teradyne’s test systems
• Design high performance probe card and loadboard to be used for our custom designed ASIC, often includes signal integrity analysis for 10Gbps SERDES links and multi-Gbps datalinks
• Works with product engineers to produce correlation reports between TER ATE results and aggregator ATE results
• Works with product engineers to manage ATE yield characterization over process
• Execute Gage R&R plan and improve test program to meet the repeatability and reproducibility goals
• Define specification limits for wafer sort (WS) and final test (FT)
• Establish acceptable yield targets for WS and FT
• Define and ensure that product quality and yield targets are met
• Track in-line wafer monitor data (process control monitors) as needed to ensure quality and yield of products
• Track yield at both WS and FT and provide periodic summary reports on yield
• Analyze supplier data to identify ways to prevent quality issues
• Provide first level of debug when WS or FT yield is below acceptable yield targets
• Looks at wafer process control monitors to identity correlation between wafer process monitors and yield
• Appropriately notifies Teradyne of production yield issues
• Archive data logs from WS and FT
• Production test development and maintenance
• Technical interface between Teradyne and vendors of Teradyne’s STE
• Sign-off of Production Test releases
• Initiate and assist in the implementation of production test changes to enhance yield as needed for cost reduction and/or assurance of supply
• Support root cause analysis of ASIC failures as first point of contact for RMAs and failure analysis
• Expedient and effective hands-on diagnosis of issues with products
• Support Root Cause Analysis as required both during development and in high volume manufacturing
• Assist in evaluation of devices as needed on bench set ups or at ATE to diagnose issues
• Support corrective action for Test Escapes by managing production test changes (limit changes, test enhancements)
• Define and support DOEs for yield and quality improvements
• Provide inputs into DFM, DFT and FMEA activities.

Education required

Bachelor’s degree in Electrical Engineering or Computer Science required

Master’s degree is preferred

10+ years of ATE test programming experience required

Teradyne Ultraflex programming experience is preferred

Expert level of semiconductor test knowledge is a must