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Senior RTL Design Engineer - Physical Design
Tenstorrent is at the forefront of AI technology, seeking a highly motivated and experienced RTL Design Engineer to enhance our Physical Design team. This role involves developing and verifying RTL code, with opportunities for collaboration on innovative projects.
Skills
- RTL design
- Verilog/SystemVerilog
- Logic design
- Power consumption optimization
- Problem-solving skills
Responsibilities
- Develop RTL code using Verilog/SystemVerilog for SoCs and subsystems.
- Collaborate with SoC teams to align design efforts.
- Define and own timing constraints with the Physical Design team.
- Perform LINT checks for design quality.
- Create detailed documentation including block diagrams.
- Conduct basic synthesis runs to verify RTL quality.
Education
- BS/MS/PhD in Electrical Engineering, Electronics & Communication Engineering, Computer Engineering, or Computer Science
Benefits
- Highly competitive compensation package
- Equal opportunity employer
- Comprehensive benefits
To read the complete job description, please click on the ‘Apply’ button
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FUNDING
DEPARTMENTS
SENIORITY LEVEL REQUIREMENT
TEAM SIZE
No info
LOCATION
SALARY RANGE
$100,000/yr - $500,000/yr
EMPLOYMENT TYPE
Full-time, hybrid
DATE POSTED
October 16, 2024
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