Staff Engineer, RTL Design, Fabric and Memory Subsystem
Tenstorrent is revolutionizing AI technology with cutting-edge performance. They are seeking an experienced engineer for Fabric and Memory Subsystem design for high-performance SOCs.
Sign up for our
weekly newsletter
of fresh jobs
Skills
Experience with CPU and GPU fabrics
Strong understanding of interconnect topologies and protocols
Hands-on experience with hardware description languages
Expertise in microarchitecture definition
Strong debugging and problem-solving skills
Responsibilities
Design and develop the Fabric and Memory subsystems for a high-performance CPU
Create RTL implementations in Verilog using industry-standard tools
Collaborate with cross-functional teams for seamless subsystem delivery
Evaluate and integrate 3rd-party IP components
Optimize power, performance, and area (PPA)
Conduct experiments with RTL and analyze synthesis results
Debug complex RTL/logic issues
Enhance RTL design infrastructure and tools
Education
BS/MS/PhD in EE/ECE/CE/CS
Benefits
Highly competitive compensation package
Equal opportunity employer
To read the complete job description, please click on the ‘Apply’ button