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Silicon Design Engineering Manager

Job Details:

Job Description: 

About Foundry Technology Development:

Technology Development (TD) is the heart and soul of Moore’s Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TD’s more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.

About the Role:

Advanced Design Library Technology Team in Design Technology Platform (DTP)/Advanced Design (AD) under Technology Development (TD) works in close collaboration with our partners in process technology and product teams to define, develop and validate logic and analog foundation IPs on Intel's leading edge process nodes to enable competitive Intel and foundry product designs.

We are looking for highly motivated and experienced technical manager to lead our logic test vehicle development and post-Si validation of logic FIP.

Responsibilities

  • Direct a team of 30 people across 3 geos to deliver logic content on all TD's test chips to meet technology development requirements on yield and performance learning.

  • Lead planning, RTL and physical design execution/signoff, on-time and high quality delivery to all TD test chips.

  • Drive on-going logic content and structure design optimization on test chips to reduce learning gaps between test chips and real products, and to reduce test time.

  • Collaborate with LTD and MPE to drive Si validation, Si report generation.

  • Define and create team schedules, interact with partner organizations, and manage interdependencies across multiple projects, teams, and stakeholders.

  • Distill complex information into clear, refined messages and present to executives.

  • Assess risks and identify solutions to achieve program objectives.

Qualifications:

Minimum

  • M.S. or Ph.D. in Electrical Engineering or related field with 10 years of professional experience digital or analog design or scientific field of study related to Semiconductor materials, fabrication, and device physics.

  • Proven track record in managing high performing team with consistent on-schedule and high-quality delivery.

  • Work effectively within ambiguous environments through a high level of motivation and focus on results.

  • Excellent communication skills.


Preferred

  • Experience in EDA tool/flow/methodology, product, and IP development cycles.

  • Familiar with digital design practice in floor planning, logic synthesis, place and route, clock tree synthesis, timing signoff using industry standard tools and methodology.

  • Working knowledge on Intel's leading process design rules.

  • Experience is post-Si debug.

  • Familiar with foundry ecosystem, customer interaction, and benchmarking practice.

  • Combine big-picture, holistic view with an engineering mindset and meticulous attention to details.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$214,730.00-$303,140.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Average salary estimate

$258935 / YEARLY (est.)
min
max
$214730K
$303140K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

What You Should Know About Silicon Design Engineering Manager, Intel

Join Intel's innovative team as a Silicon Design Engineering Manager in the picturesque Hillsboro, Oregon! At Intel, we are steadfast in our pursuit of pushing the boundaries of technology to enrich lives through our state-of-the-art infrastructure. In this exciting role with the Advanced Design Library Technology Team, you'll lead a talented group of 30 professionals across multiple geographies. Together, you'll collaborate with process technology and product teams to develop and validate both logic and analog foundation intellectual properties (IPs) on cutting-edge process nodes. Your responsibilities will include overseeing the delivery of logic content to meet our technology development goals, optimizing design structures, and driving Si validation processes. With the rare opportunity to influence projects at a high level, you'll be distilling complex technical information into digestible insights for our executives. Your contributions will not only refine our products but also shape the future of semiconductor manufacturing. If you are an experienced leader with a strong background in electrical engineering, coupled with an enthusiasm for innovation and high-quality delivery, we want to hear from you. Bring your passion and expertise to Intel, where your work will truly make a difference!

Frequently Asked Questions (FAQs) for Silicon Design Engineering Manager Role at Intel
What are the main responsibilities of a Silicon Design Engineering Manager at Intel?

As a Silicon Design Engineering Manager at Intel, you will lead a team of 30 professionals to deliver logic content for all Technology Development test chips. Your key responsibilities include overseeing RTL and physical design execution, ensuring on-time and high-quality project delivery, and optimizing design structures to minimize learning gaps and reduce test times. Additionally, you will collaborate closely with various teams, present findings to executives, and manage schedules and interdependencies across multiple projects.

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What are the qualifications needed for a Silicon Design Engineering Manager role at Intel?

To qualify for the Silicon Design Engineering Manager position at Intel, candidates should possess a Master’s or Ph.D. in Electrical Engineering or a related field, along with at least 10 years of professional experience in digital or analog design. A proven track record in managing high-performing teams, exceptional communication skills, and the ability to navigate ambiguous environments are essential. Preferred qualifications include familiarity with EDA tools, digital design practices, and post-Si debugging.

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What is the team structure like for Silicon Design Engineering at Intel?

The Silicon Design Engineering Manager role at Intel involves directing a diverse team of 30 individuals spread across three geographical regions. The team collaborates closely with other departments, including process technology and product design teams, to ensure that all aspects of logic test vehicle development and post-Si validation are met. Collaboration and communication are integral to the role, as you'll be interfacing frequently with stakeholders involved in different layers of the technology development process.

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What skills are essential for success as a Silicon Design Engineering Manager at Intel?

To thrive as a Silicon Design Engineering Manager at Intel, it is crucial to have a deep understanding of digital design practices, including floor planning, logic synthesis, and timing signoff. Equally important are strong leadership skills, the ability to distill complex information for varied audiences, and a holistic engineering mindset that combines big-picture thinking with meticulous attention to detail. Familiarity with Intel's leading process design rules and a background in foundry ecosystems can further enhance your effectiveness in this role.

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What locations are available for the Silicon Design Engineering Manager position at Intel?

The Silicon Design Engineering Manager position at Intel is primarily located in Hillsboro, Oregon, but may also offer opportunities to work in other key locations, including Arizona's Phoenix, California's Folsom, Santa Clara, and Austin. Intel supports a hybrid work model, which allows for flexibility in balancing onsite and remote work, making it an attractive option for candidates looking for a versatile working environment.

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Common Interview Questions for Silicon Design Engineering Manager
How do you manage a diverse team across different geographical locations?

Managing a diverse team across multiple geographies requires effective communication and strong organizational skills. It's important to establish clear goals, utilize collaborative tools for communication, and regularly check in with team members to address any challenges they might face. Emphasizing team-building activities, recognizing individual contributions, and fostering a culture of inclusiveness will help ensure that all team members feel valued and engaged.

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Can you describe your experience with RTL design and execution in silicon design?

In discussing your experience with RTL design, highlight specific projects where you played a crucial role in the design and execution phases. Discuss the methodologies you used, your familiarity with industry-standard tools, and the outcomes of those projects, including any specific improvements in performance or yield. Providing quantitative results helps substantiate your experience.

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How do you approach problem-solving within silicon design projects?

Approach problem-solving by employing a systematic methodology: first, identify the core issue through data analysis and team discussions. Then, brainstorm potential solutions and assess their feasibility based on resources and timelines. Collaboration with stakeholders is key; leverage their insights while maintaining clear communication to keep the project on track. Finally, evaluating the results of implemented solutions will help refine your approach for future challenges.

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What strategies do you employ to ensure timely project deliverables?

To ensure timely project deliverables, develop a robust project plan that includes clear milestones and deadlines. Regular status meetings can help keep the team accountable while fostering open communication about potential roadblocks. Utilize project management tools to monitor progress closely. Additionally, being proactive about any changes in scope or resources can help mitigate delays and keep the project on schedule.

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How do you ensure high-quality design output in your projects?

Ensuring high-quality design output begins with establishing stringent design specifications and quality benchmarks. Implement regular design reviews and verification processes throughout the project to catch issues early. Encourage a culture of excellence within your team where each member is responsible for the quality of their work. Lastly, utilizing simulation and testing tools can help verify that designs meet the established criteria before proceeding further.

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What is your understanding of post-Si validation, and why is it important?

Post-Si validation is crucial as it verifies that silicon prototypes function as intended and meet design specifications. It involves running a series of performance tests on the chips produced to ensure that they align with the expectations set during the design phase. This process helps identify any discrepancies early, ultimately facilitating corrections that can improve future designs and processes, and is critical for maintaining Intel's reputation for delivering quality products.

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What tools do you commonly use for EDA in silicon design?

In silicon design, I typically utilize industry-standard Electronic Design Automation (EDA) tools such as Cadence, Synopsys, and Mentor Graphics for tasks like simulation, synthesis, and verification. Discuss particular features of these tools that you've used effectively, such as timing analysis, layout optimization, or debugging capabilities, and how they've contributed to successful project outcomes.

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Describe a time when you faced a significant challenge in project management. How did you overcome it?

When discussing a project management challenge, clearly outline the context of the situation, the specific challenges encountered, and the steps you took to address them. Emphasize your analytical skills in identifying the problem, your strategic planning in devising a solution, and how you communicated with your team and stakeholders throughout the process. Highlight the results and what you learned from that experience to emphasize your growth as a manager.

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How do you stay updated with the latest technologies in silicon design?

Staying updated with the latest technologies in silicon design involves continuous learning through various channels. I regularly participate in industry-related conferences and webinars, subscribe to relevant journals and online forums, and engage with professional networks. Additionally, I prioritize ongoing education, whether through formal courses or self-directed study, to ensure my skills and knowledge remain current in this rapidly evolving field.

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Why do you want to work for Intel as a Silicon Design Engineering Manager?

Express your enthusiasm for Intel by emphasizing their commitment to innovation and quality in semiconductor manufacturing. Discuss how Intel’s values align with your personal and professional goals, and highlight your excitement for the opportunity to contribute to groundbreaking technology. Mention specific initiatives at Intel that resonate with you, demonstrating that you’ve researched the company and are genuinely interested in being part of its mission.

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MATCH
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BADGES
Badge ChangemakerBadge Diversity ChampionBadge Flexible CultureBadge Global CitizenBadge Work&Life Balance
CULTURE VALUES
Inclusive & Diverse
Rise from Within
Mission Driven
Diversity of Opinions
Work/Life Harmony
Growth & Learning
Transparent & Candid
Customer-Centric
BENEFITS & PERKS
Snacks
Onsite Gym
Family Coverage (Insurance)
Medical Insurance
Dental Insurance
Vision Insurance
Mental Health Resources
Life insurance
Disability Insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
Learning & Development
Paid Time-Off
401K Matching
Maternity Leave
Paternity Leave
FUNDING
DEPARTMENTS
SENIORITY LEVEL REQUIREMENT
TEAM SIZE
EMPLOYMENT TYPE
Full-time, hybrid
DATE POSTED
April 20, 2025

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