Digital Verification

Job Description:

Performs semiconductor design engineering duties including design, development, and testing for firm products and devices in conjunction with product development for the electronic communications industry. Define and write IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications). Write System Verilog (UVM) monitors, drivers, response checkers and System Verilog Assertion (SVA) cover properties to match the verification plans. Developing and maintaining portions of a verification environment including scripts and Make files. Debug failing test cases to determine source of failure and track resolution. Collect code and functional coverage results from random simulations, and analyzing uncovered events to determine additional test scenarios needed for coverage. Perform assertion-based formal verification of blocks and IPs to ensure they meet requirements.

Qualifications:

Master’s degree in Electrical and Computer Engineering, Electronics Engineering, foreign equivalent or related field.

Two (2) years of experience in the job offered, SoC Design Engineer, Design Verification Engineer or similar occupations.

Required skills:

Position requires two (2) years of experience in:

• Programming Languages Perl,
• Logic Design,
• Debugging;
• Simulation and/or Validation;
• Verilog and System Verilog; and

Verification skills utilizing OVM (Open Verification Methodology)/UVM (Universal Verification Methodology).

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.