Job details

Director, ASIC Engineering

About us:

Aeva’s mission is to bring the next wave of perception to a broad range of applications from automated driving to industrial robotics, consumer electronics, consumer health, security, and beyond. Aeva is transforming autonomy with its groundbreaking sensing and perception technology that integrates all key LiDAR components onto a silicon photonics chip in a compact module. Aeva 4D LiDAR sensors uniquely detect instant velocity in addition to 3D position, allowing autonomous devices like vehicles and robots to make more intelligent and safe decisions.

Role Overview:

Aeva is seeking a hands-on Digital Design Director. In this role, you will be responsible for the Front End Design Group; Managing design activities from concept to final characterization and qualification.

What you'll be doing:

You are expected to have hands-on experience with most aspects of architecture, RTL design, verification, DFT, design for debug, and post-silicon bring-up and characterization.
Lead an RTL design team from the definition of design, implementation, post-Si bring-up, and qualification.
Collaborate with system architects, algorithm developers, and analog designers.
Drive methodologies, selection of CAD tools, and 3rd party IP.
Lead the execution of architecture, performance modeling, uArch, RTL, and verification. Lead by example in a fast-paced environment.
Be a clear communicator with a proven ability to work across functions inside the company, and with partners across the globe.

What you'll have:

Extensive Verilog RTL Design and Implementation (coding) experienceExperience with the integration of mixed-signal IP and PHYs.
Experience with prototyping systems on FPGA platforms or emulators.
Hands-on experience with Atlassian, Git, and other planning tools.
Experience analyzing data flows in complex SoC, including DSP processing.
Familiarity with the automotive development process.
Ability to engage with strategic customers and represent the product.
BSEE, MSEE, or Ph.D. with 8+ years of relevant experience in Digital ASIC design and integration.5+ years of experience as a project lead managing other engineers.