Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.
Who We Are
The E-core CPU team is powered by some of the brightest and most innovative minds in the industry and we need you. Intel has a vision to create and extend computing technology to connect and enrich the lives of every person. We are designing future generations of high-performance E-core CPUs using the most advanced and innovative process technologies. If you are looking to grow and develop your skillsets while be surrounded by highly motivated and knowledgeable teammates, then this is the organization for you.
E-Core CPUs are the industry leading performance per watt CPU that helps:
Power the latest Intel laptops, desktops and high-end gaming platforms.
Drive 5G communications by serving as the base-station that delivers essential data from your electronic devices across the world at maximum bandwidth.
Create Artificial Intelligence (AI) and machine learning devices.
Enable a full virtual learning experience for students using the latest Google Chromebooks.
Who You Are
As a CAD Physical Design Engineer in the E-core CPU group, you will be responsible for:
Developing, debugging, and supporting tools, flows and methodologies covering backend physical design methodologies and flow automation for high performance blocks and full chip level using RTL2GDS standard cell level design techniques.
Performing analysis of either synthesis, place and route, floor planning or signoff for static timing analysis on timing paths, formal equivalence verification, power consumption, electrical rule checking and circuit reliability to identify key issues.
Working closely with design teams to understand and debug tool issues and constraints.
Working with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU.
Creating documentation and help with guidelines/specs.
Communicating with other team members to solve problems and following solutions through to completion Excellent verbal and written English communication skills.
You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
Bachelor's Degree in Computer Engineering and/or Electrical Engineering and 1+ years of relevant working experience OR Master's Degree in Computer Engineering and/or Electrical Engineering in Computer Engineering and/or Electrical Engineering OR
1+ years of experience in VLSI, design automation algorithms, and transistor-level design
1+ years of experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from vendors such as Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification.
1+ years' experience with Python, Perl, and/or Tcl scripting languages.
Preferred Qualifications
1+ years of relevant working experience in microprocessor or other high speed design backend design.
Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints)
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://jobs.intel.com/en/benefits
Annual Salary Range for jobs which could be performed in the US:
$121,050.00-$170,890.00Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.
Are you ready to embark on an exciting journey as a CPU Physical Design Automation Engineer at Intel? Located in the heart of Austin, Texas, you'll be joining a team that is spearheading innovations in high-performance E-core CPUs. At Intel, we believe in doing something wonderful every day, and with your skills in backend physical design methodologies and automation, you will be at the forefront of creating groundbreaking technology that changes lives. You will be responsible for developing and debugging tools that streamline design flows and methodologies, ensuring our CPUs are synonymous with efficiency and power. Collaborating closely with design teams, you'll tackle complex challenges from timing analysis to power consumption. Your expertise in industry-standard EDA tools will shine as you enhance our design capabilities and refine our methodologies. Here at Intel, we cherish communication and teamwork, encouraging you to share insights and solutions for optimal results. Plus, you’ll have the invaluable opportunity to work with a highly motivated team of professionals passionate about technology. If you have a Bachelor's or Master's degree in Computer Engineering or Electrical Engineering, with relevant experience in VLSI and scripting languages like Python and Perl, then this position is a match for you. Join us in Austin and help shape the future of computing technology!
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