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IP Design Verification Engineer at INTEL summary:

The IP Design Verification Engineer is responsible for developing and managing functional verification infrastructure for I/O Memory Management Unit (IOMMU) IP used in Intel's Client and Server products. This role involves creating comprehensive regression test suites, analyzing performance requirements, and participating in technical reviews with design teams. The engineer collaborates with a team focused on advancing I/O virtualization and improving workload security and performance in cutting-edge technologies.

Job Description

About the team:
- I/O Memory Management Unit ( IOMMU ) IP is an integral part of Client and Server products, which enables I/O Virtualization (Intel VT-d) on Intel platforms. In today’s AI-focused datacenters and personal computing platforms, there is a renewed focus on improving the power, performance of I/O workloads, and security between different execution contexts. IOMMU plays a critical role in all of this.
- The team is an ambitious, mission-focused team primarily based out of the U.S.
What you get:
- You will be working on an IOMMU IP that goes into the latest, cutting-edge Intel Server (Xeon) and Client products
- Intel is a pioneer in I/O interconnect architecture. You will be exposed to the latest generation of IO protocols
- Intel’s network for mentorship and career development
- Opportunity to work with and learn from talented engineers responsible for some of the most fundamental building blocks in x86 architecture.
Job Description and Responsibilities will include but are not limited to:
- Developing and owning functional verification infrastructure (checkers, stimulus, agents, coverage, scripts etc.) of IP logic to ensure design will meet architectural specifications.
- Formulating and deploying comprehensive regression test suites to find all possible bugs
- Development and In-depth analysis of cover points to meet feature expectations.
- Participating and/or driving technical reviews and test plans of new features for future products with design and architecture teams.
- Developing and deploying test cases and infrastructure for validating IP performance requirements, and analyzing performance gaps
- Assist in debugging SoC Pre- and Post-Si issues

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's or Master’s Degree or equivalent with 5+ years of experience.

Preferred Qualifications:

Demonstrate knowledge of developing testbench infrastructure, checkers, and integrating VIP collateral such as BFMs.
Development of test sequences to verify the IP against the HAS is a requirement.
Root cause test failure down to the RTL level is plus.

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US, TX, Austin; US, AZ, Phoenix; US, CA, Folsom; US, CA, Santa Clara; US, MA, Boxborough

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Annual Salary Range for jobs which could be performed in the US $139,710.00-$197,230.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Keywords:

IP design verification, IOMMU, I/O virtualization, functional verification, performance analysis, regression test suites, system on chip, electronic engineering, Intel, hardware design

Average salary estimate

$168470 / YEARLY (est.)

min

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$139710K

$197230K

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What You Should Know About IP Design Verification Engineer, Intel

Are you an experienced IP Design Verification Engineer looking to take your skills to the next level? At Intel, located in beautiful Folsom, CA, you'll be knee-deep in cutting-edge technology, leading the charge in the development and management of functional verification infrastructure for our I/O Memory Management Unit (IOMMU) IP. This pivotal role involves crafting comprehensive regression test suites and analyzing performance requirements to ensure our products meet the highest standards. In collaboration with a dedicated team, you'll help advance I/O virtualization and bolster workload security and performance across both Client and Server products. You’ll be working on innovative technologies vital for AI-focused data centers, offering you a chance to make a real difference in personal computing. With mentorship and career development opportunities at Intel, you’ll learn from some of the brightest minds in the field while contributing to the latest generations of I/O protocols. From developing test cases to participating in technical reviews, your expertise will shine as we aim for excellence in every project. If you're passionate about debugging SoC issues and driving technical reviews of new features, we want to hear from you. Join us in transforming the future of cloud computing and high-performance devices at Intel, where your skills will truly matter!

Frequently Asked Questions (FAQs) for IP Design Verification Engineer Role at Intel

What are the main responsibilities of an IP Design Verification Engineer at Intel?

An IP Design Verification Engineer at Intel is tasked with developing and managing functional verification infrastructure for the I/O Memory Management Unit (IOMMU) IP. Responsibilities include creating regression test suites, collaborating with design teams for technical reviews, and ensuring the design meets architectural specifications.