Job details

Lead Test Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Validate DDR, LPDDR and GDDR Cadence test chip silicon for leading edge protocols and advanced nodes. Bringup, characterization and validation of test chips. Work with design team to debug problems and performance issues. Report results to design teams. Generate test reports.

Position Requirements

Candidate’s background should include a minimum 1 year of silicon test and validation experience
Good understanding of lab equipment and measurement techniques for high speed interfaces. High speed scopes, probes, spectrum analyzers, BERTs.
Software proficiency for test scripting, data handling and reporting using scripting languages such as Python, TCL etc.
Communicate with global teams (US, India, China, EU), which work in different time-zones
Excellent problem-solving skills, good communication skills and ability to work cooperatively in a team environment
Work with design team to understand requirements, fashion tests and review results
BEng, MEng

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