Responsible for all aspects of physical implementation from RTL to GDS, including RTL synthesis, scan stitching, timing constraints creation, Power analysis, chip floor plan, clock distribution, full chip assembly, Timing driven Placement & Route, Static Timing Analysis, timing closure, ECO and tapeout.
This position is located in Austin, TX
This is a hybrid position and will follow a 2+ day in-office work schedule, with in-office days based on business needs and team preference. You must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning employment with Cirrus Logic.
Cirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gender identity, genetic information or any other characteristic protected by law.
Cirrus Logic provides innovative, high-performance analog and digital signal processing products that “rock” (advance our customers, benefit our shareholders and reward our employees): - To exceed our customers’ expectations - Deliver solid value ...
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