Principal FPGA / RTL Design Engineer
Skills
- RTL design fundamentals
- Verilog and System-Verilog expertise
- FPGA synthesis tools
- Digital signal processing designs
- Scripting languages like Perl and Python
Responsibilities
- Working with system engineers and digital design architects for wireless communication projects
- RTL coding, simulation, and test bench development
- FPGA synthesis and timing closure
- Hardware verification and troubleshooting
- Providing support to RF and Software Engineering Teams
Education
- Bachelor of Science in Electrical Engineering, Computer Science, or relevant fields
- Advanced degree preferred (M.S. or Ph.D.)
Benefits
Average salary estimate
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