FPGA/ASIC Design Engineer (Silicon Engineering)
Skills
- Verilog/SystemVerilog
- ASIC design
- FPGA design
- SoC integration
- EDA tools
Responsibilities
- Design digital ASICs and/or FPGAs for Starlink projects
- Implement or integrate design blocks using Verilog/SystemVerilog
- Optimize designs for power, performance and area
- Participate in ASIC and FPGA design phases
- Collaborate with software engineers on production software
Education
- Bachelor’s degree in electrical engineering, computer engineering or computer science
Benefits
- Comprehensive medical, vision, and dental coverage
- 401(k) retirement plan
- Paid parental leave
- 3 weeks of paid vacation & 10+ holidays
- Employee Stock Purchase Plan
Average salary estimate
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