Staff CPU Verification Engineer

Overview

• Lead a high performing verification team to excellence
• Develop SystemVerilog UVM and/or formal verification for the block-level, functional verification of units
• Build and maintain detailed verification plans
• Generate and run test cases on logic simulation models
• Debug functional errors in the RTL model, using simulation tools, debug tools with an in-depth understanding of the architecture and RTL design
• Define and implement functional and statistical coverage, and improve the testbench to ensure coverage closure

Required Skills and Experience

• Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering, with a GPA of 3.0 or higher
• A minimum of 10 years of experience in pre-silicon verification
• CPU microarchitecture experience including knowledge of pipeline, fetch, issue, Load/Store, L2 cache and MMU
• Previous experience in verifying such units using simulation and/or formal verification methods
• Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms
• Experience with functional coverage driven verification methods

• You have a deep understanding of SystemVerilog and UVM, and you know how they are used to build flexible and reusable testbenches
• You love sophisticated software engineering such as design patterns, profiling, unit testing, and programming in multiple languages
• You strive to achieve wining solutions
• You build positive relationships which are built upon mutual trust, open communication and sharing of information and success.
• You have a drive for continuous improvement through spotting opportunities and seeking the views of others
• You listen to different perspectives, evaluate, persuade and carefully shape your work to deliver impactful results

Hybrid Working at Arm