Job details

Lead CPU Performance Architect, Silicon

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.Minimum qualifications:• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.• 8 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.• Experience in CPU architecture with CPU blocks.• Experience in performance modeling, analysis, correlation, and workload characterization.Preferred qualifications:• PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.• Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.• Knowledge of system software components, such as Linux, drivers, and runtime.• Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86).• Excellent verbal and written communication skills.About The JobBe part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.As a Lead CPU Performance Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google’s advanced SoC products. You will have the opportunity to collaborate with talents in Google’s Android applications and Google’s AI teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.The US base salary range for this full-time position is $177,000-$266,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .Responsibilities• Deliver solutions to problems that may be ambiguous or lacking clear precedent including CPU performance, micro-architecture design, tool infrastructure, and methodology.• Plan, drive, and evaluate ARM’s architecture features from both architecture and performance angles.• Define and write CPU subsystem architecture specifications.• Lead the collaboration with RTL, design verification, and physical design teams to develop an efficient CPU implementation.• Drive performance correlation between the performance model and RTL implementation, and perform pre-silicon and post-silicon performance bug triage.Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Google Glassdoor Company Review

4.4

Google DE&I Review

No rating

CEO of Google

Sundar Pichai

Approve of CEO

Average salary estimate

$221500 / YEARLY (est.)

min

max

$177000K

$266000K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

What You Should Know About Lead CPU Performance Architect, Silicon, Google

Are you ready to lead the charge in shaping the future of CPU architecture? Join Google as a Lead CPU Performance Architect in beautiful Mountain View, CA, where you’ll become an integral part of a diverse team dedicated to developing innovative silicon solutions for products loved by millions. As a pivotal contributor, you’ll engage in creating advanced processor instruction set architectures and developing cutting-edge micro-architecture features. Your experiences in high-performance microprocessor architecture will allow you to push boundaries in engineering excellence. Collaborating with talented teams from Google’s AI and Android applications, you will conduct performance analysis and project outcomes throughout various design phases. The ideal candidate will hold a master’s degree, with eight years of relevant experience under their belt, while those with a PhD will have an edge. You’ll need to be passionate about performance modeling, analysis, and workload characterization, with a solid understanding of system software components like Linux. Communication is key; thus, your verbal and written skills need to shine. The salaried compensation ranges from $177,000 to $266,000, adding a bonus and equity into the mix, reflecting the premium nature of this pivotal role. If you’re eager to make a significant impact through fact-driven designs in CPU performance, this is the role for you—come make a difference at Google!

Frequently Asked Questions (FAQs) for Lead CPU Performance Architect, Silicon Role at Google

What responsibilities does a Lead CPU Performance Architect at Google hold?

As a Lead CPU Performance Architect at Google, your responsibilities encompass delivering innovative solutions to ambiguous problems related to CPU performance and micro-architecture design. You'll define CPU subsystem specifications, collaborate closely with various teams like RTL and physical design, and drive performance correlation between models and implementations. Your insights will be instrumental in enhancing ARM architecture features from both an architectural and performance standpoint.