Job details

Design Verification Engineer

Q: What are the key responsibilities of a Design Verification Engineer at Etched?

The Design Verification Engineer at Etched is pivotal in guaranteeing that our first ASIC is ready for market release. Responsibilities include developing test benches for various components, ensuring that the silicon meets quality standards, and collaborating with the VP of Hardware Engineering. Effective communication and technical expertise are crucial to navigate the fast-paced environment of AI chip development.

Q: What qualifications do I need to apply for the Design Verification Engineer position at Etched?

To qualify for the Design Verification Engineer position at Etched, candidates should have at least 8 years of relevant experience in developing scalable test benches. A solid understanding of the System Verilog testbench language, familiarity with high-speed SerDes, and a genuine passion for cutting-edge AI technologies like ChatGPT are essential. Additional knowledge of chip-to-chip interconnects and scripting in Python will be advantageous.

Q: What benefits can I expect as a Design Verification Engineer at Etched?

As a Design Verification Engineer at Etched, you'll enjoy a comprehensive benefits package that includes full medical, dental, and vision coverage with 100% of premiums paid. Additionally, there's a $2,000/month housing subsidy for employees living nearby, daily meals provided in the office, and relocation support for new team members moving to Cupertino.

Q: What is the work culture like at Etched for the Design Verification Engineer role?

At Etched, the work culture is designed to foster collaboration between engineering and research teams. We believe in a hands-on approach, where our Design Verification Engineers are empowered to contribute not just to verification tasks, but also to the overall research and development efforts. We maintain an in-person work environment that encourages brainstorming and innovative thought.

Q: What technologies should I be familiar with for the Design Verification Engineer job at Etched?

Candidates for the Design Verification Engineer position at Etched should be familiar with advanced semiconductor technologies, including experience with HBM3/HBM3E standards, transformer models, numerical representations, and open-source verification tools like Verilator. A solid skill set in System Verilog and Python programming is critical to excel in this role.

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Design Verification Engineer

Etched is building the hardware for superintelligence.

GPUs and TPUs are flexible AI chips that can run many kinds of models: CNNs, RNNs, LSTMs, and more. But today, almost all AI workloads, from ChatGPT to self-driving cars, are done on one model architecture: transformers. Using flexible AI chips for transformers is very inefficient: <5% of the transistors on an H100 are used for matrix multiplication!

Etched is building a single-purpose chip exclusively for transformer inference. We only support transformers, but in exchange our chips have an order of magnitude more throughput and lower latency than an H100. With Etched, you can build products that would be impossible with GPUs, like tree-of-thought agents and ultra-low-latency audio chat bots.

We are seeking highly motivated Principal Verification Engineers to join our team. Our verification This role will report to the VP of Hardware Engineering.

Responsibilities:

Ensure shippable first silicon for Etched’s first ASIC.
Develop test benches for blocks and IP.

Requirements:

At least 8 years of relevant experience developing scalable test benches.
Proven understanding of System Verilog testbench language.
Experience with high speed SerDes.
Willing to start quickly.
Passionate about modern AIs like ChatGPT, and willing to learn about them on the job.

Desired qualifications:

Experience with chip-to-chip interconnects and HBM3/HBM3E technologies.
Familiarity with transformer models and machine learning.
Familiarity with numerical representations and functions.
Ability to program with Python or another scripting language.
Familiarity with open-source verification tools like Verilator.

Benefits

Full medical, dental, and vision packages, with 100% of premium covered
Housing subsidy of $2,000/month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to Cupertino

How we’re different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Average salary estimate

$150000 / YEARLY (est.)

min

max

$120000K

$180000K

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What You Should Know About Design Verification Engineer , Etched

If you're a passionate Design Verification Engineer, this is your chance to join Etched, the innovative company making waves by building hardware for superintelligence! In the heart of Cupertino, we’re focused on creating a specialized chip designed exclusively for transformer inference. Unlike conventional GPUs and TPUs, our chips offer an impressive increase in throughput and lower latency, transforming how products are built in the AI space. As a Principal Verification Engineer, you’ll play a critical role in ensuring that our first ASIC is ready to ship. You’ll develop advanced test benches for various blocks and IP while collaborating closely with the VP of Hardware Engineering. Your experience—at least 8 years—should encompass scalable test bench development and a strong grasp of the System Verilog testbench language. If you’re excited about cutting-edge technologies in AI like ChatGPT and eager to learn more about modern AI advancements, Etched is the perfect place for you to thrive. You’ll enjoy a vibrant workplace that supports crucial engineering and research collaboration, along with generous benefits including medical coverage, a housing subsidy for local employees, and daily meals in-office. Ready to help us redefine what's possible? Join us at Etched and let’s create the future together!

Frequently Asked Questions (FAQs) for Design Verification Engineer Role at Etched

What are the key responsibilities of a Design Verification Engineer at Etched?

The Design Verification Engineer at Etched is pivotal in guaranteeing that our first ASIC is ready for market release. Responsibilities include developing test benches for various components, ensuring that the silicon meets quality standards, and collaborating with the VP of Hardware Engineering. Effective communication and technical expertise are crucial to navigate the fast-paced environment of AI chip development.