Job details

Senior ASIC Design Verification Engineer

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Company:

Qualcomm Atheros, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm WLAN HW team is responsible for the development and delivery of best-in-class WLAN/WiFi solutions that are setting benchmarks in the wireless industry. In this role, you will be verifying our PHY Sub-System and ensuring highest quality deliverables.

Job responsibilities:

Understanding of WLAN PHY TX and RX design paths
Verifying algorithms that control the various aspects of wireless systems
Develop test plans to verify WiFi Standards, creating test sequences, and validating design components
Own end-to-end DV tasks from coding Test benches, test cases creation, crafting assertions, running simulations, and achieving all coverage goals
Explore innovative DV methodologies (formal, simulation, and emulation strategies) to continuously push the quality and efficiency of test benches
Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals

Required Skillset:

Strong SystemVerilog / UVM based verification skills, experience with assertions, and coverage-based verification methodology
Strong debugging, Analytical and problem-solving skills
Experience in formal / static verification methodologies will be a plus
Good understanding of WiFi or other wireless communications standards is a plus
Experience with GLS, and scripting languages such as Perl, Python is a plus

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Preferred Qualifications:

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

•   3+ years of ASIC design, verification, validation, integration, or related work experience.
•   2+ years of experience with architecture and design tools.
•   2+ years of experience with scripting tools and programming languages.

• 2+ years of experience with design verification methods.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$126,700.00 - $190,100.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

Average salary estimate

$158400 / YEARLY (est.)

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$126700K

$190100K

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What You Should Know About Senior ASIC Design Verification Engineer, Qualcomm

Are you a talented Senior ASIC Design Verification Engineer seeking an exciting opportunity to make an impact? Look no further than Qualcomm Atheros, Inc. in sunny Santa Clara, California! Here, you'll dive into the heart of WLAN/WiFi solutions, working with a team that's dedicated to delivering top-notch products that are reshaping the wireless industry. Your primary responsibility will be to verify our PHY Sub-System, ensuring it meets our high standards of quality. In this role, you’ll be engaged in understanding WLAN PHY TX and RX design paths, and validating algorithms that govern various aspects of our leading-edge wireless systems. You'll have the chance to craft detailed test plans that verify WiFi standards, create test sequences, and ensure all design components hold up to scrutiny. You’ll own the end-to-end design verification tasks, from coding test benches and creating test cases, to running simulations and achieving all coverage goals. Moreover, you'll get to explore innovative methodologies that will push the quality and efficiency of our test benches even further. And don’t worry—collaboration is key here. You’ll enjoy building relationships with design, silicon, and architecture teams around the world to successfully meet all project milestones. If you have the passion for innovation and quality and possess a strong background in SystemVerilog, UVM, and wireless communications, we would love to have you join our Qualcomm family!

Frequently Asked Questions (FAQs) for Senior ASIC Design Verification Engineer Role at Qualcomm

What are the key responsibilities of a Senior ASIC Design Verification Engineer at Qualcomm Atheros?

As a Senior ASIC Design Verification Engineer at Qualcomm Atheros, your responsibilities will include verifying WLAN PHY TX and RX design paths, developing test plans for WiFi standards, and writing test benches and assertions. You'll also be expected to run simulations and explore innovative design verification methodologies to improve the quality and efficiency of testing.