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Design Engineer - CPU Subsystem

The Opportunity


We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

Why Join Us?

  • Opportunity to work on cutting-edge ARM-based SoC designs.
  • Work with a team in a high-impact, fast-paced environment.
  • Competitive compensation and career growth opportunities.
  • Work alongside some of the best minds in the semiconductor industry.

What You'll Do

  • As a key member of the team, you will own the Interrupt Subsystem components for multi-core Arm based CPU SOC
  • Create Micro-Architecture documentation for the Interrupt Subsystem
  • Configure Arm GIC Interrupt controller and distributor at CPU subsystem
  • Integrate Configured RTL into subsystem and full chip level
  • Collaborate with DV Engineers and Support Debugging activities
  • RTL Quality checks using Spyglass
  • Generate UPF power definitions to support multi-power domains
  • Perform first level Synthesis to enable RTL delivery
  • Collaborate with backend team for Synthesis, implementation, STA, etc.

What You'll Need

  • This role reports to the Sr. Director of SOC and requires a minimum 8+ years in SoC architecture/design.
  • Proficiency with ARM-specific SoCs.
  • Strong background in digital design, RTL coding (Verilog/VHDL), and ASIC/FPGA debug methodologies
  • Proven experience in SOC design
  • Strong knowledge of interrupt distribution within multi-core CPU SoC and across Chiplets
  • Deep understanding of hardware design, verification, and post-silicon validation

It Would Be Amazing If You Had

  • Experience in multi-core, multi-voltage, multi-power domain debug design micro-architecture and RTL design
  • Supporting and bringing up FPGA, Emulation based systems
  • Experience working across multiple chiplets in large-scale SOCs
  • Hands-on SoC bring up experience in a lab environment

We have a flexible work environment to support and help employees thrive in personal and professional capacities.

Salary and Benefits

Your contribution will be recognized with a base salary within the range of $130,000 to $160,000 annually as It is influenced by your qualifications, experience, location, and the internal equity of our team to ensure fairness and consistency across roles. In addition to our comprehensive benefits package, employees are also eligible for additional compensation opportunities, including a short-term incentive program, Retirement & Saving Programs and participation in the Employee Stock Purchase Plan (ESPP)

You'll also be eligible for competitive benefits described as per below:

Health & Wellness

Our programs emphasize knowledge and prevention, helping you stay proactive and prepared to manage your health at every stage.

  • Comprehensive health plans
  • Wellness Spending Account (WSA)
  • Employee Assistance Program (EAP)

Time Off

We value the importance of rest and recharge, which is why we offer flexible time off options to support your well-being.

  • Paid Vacation
  • Paid Holidays
  • Parental Leave

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

Average salary estimate

$145000 / YEARLY (est.)
min
max
$130000K
$160000K

If an employer mentions a salary or salary range on their job, we display it as an "Employer Estimate". If a job has no salary data, Rise displays an estimate if available.

What You Should Know About Design Engineer - CPU Subsystem, Alphawave Semi

Join Alphawave Semi as a Design Engineer - CPU Subsystem and become a pivotal part of shaping the future of data communication technology! Based in the vibrant tech hub of San Jose, California, you’ll be working in an innovative environment that is pushing boundaries in industries such as AI, 5G, and autonomous vehicles. In this role, you’ll own the Interrupt Subsystem components within multi-core Arm-based CPU SOC designs, integrating your technical expertise into cutting-edge projects. You’ll create Micro-Architecture documentation and configure Arm GIC Interrupt controllers, all while collaborating with a talented team of engineers who are passionate about developing groundbreaking technologies. With over 8 years of SoC architecture/design experience, a strong digital design background, and proficiency in RTL coding, you'll be equipped to excel in this fast-paced, high-impact role. You'll also have opportunities for personal and professional growth, supported by competitive compensation ranging from $130,000 to $160,000, comprehensive health benefits, and flexible time off. So, if you’re looking to leave your mark in the semiconductor industry, join us at Alphawave Semi where your ingenuity and dedication to innovation will truly make a difference!

Frequently Asked Questions (FAQs) for Design Engineer - CPU Subsystem Role at Alphawave Semi
What are the responsibilities of a Design Engineer - CPU Subsystem at Alphawave Semi?

As a Design Engineer - CPU Subsystem at Alphawave Semi, you will be responsible for managing the Interrupt Subsystem components for multi-core Arm-based CPU SoCs. Your duties will involve creating Micro-Architecture documentation, configuring the Arm GIC Interrupt controller, integrating RTL, and collaborating with design verification (DV) engineers. Understanding and applying best practices in digital design will be crucial for succeeding in this role.

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What qualifications are required for the Design Engineer - CPU Subsystem position at Alphawave Semi?

To qualify for the Design Engineer - CPU Subsystem role at Alphawave Semi, candidates should possess a minimum of 8 years of experience in SoC architecture and design. A strong background in digital design, RTL coding in Verilog or VHDL, and a deep understanding of interrupt distribution within multi-core CPU SoCs is essential. Candidates with hands-on SoC bring-up experience in lab environments will find this role particularly rewarding.

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What benefits does Alphawave Semi offer to Design Engineer - CPU Subsystem employees?

Alphawave Semi offers a comprehensive benefits package for Design Engineer - CPU Subsystem employees, including health plans, a Wellness Spending Account, an Employee Assistance Program, and flexible time off options. In addition, employees have the opportunity to participate in short-term incentive programs, retirement savings plans, and the Employee Stock Purchase Plan (ESPP).

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What kind of work environment can Design Engineer - CPU Subsystem employees expect at Alphawave Semi?

At Alphawave Semi, Design Engineer - CPU Subsystem employees can expect a flexible work environment that fosters innovation and supports their personal and professional growth. The company values teamwork and collaboration, empowering employees to thrive while contributing to exciting and impactful projects in the semiconductor industry.

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How does Alphawave Semi approach diversity and inclusion for the Design Engineer - CPU Subsystem role?

Alphawave Semi is committed to diversity and inclusion, providing an equal opportunity for all applicants for the Design Engineer - CPU Subsystem role. The company embraces diversity across various characteristics and backgrounds and values the unique perspectives that all employees bring to the team. Accommodations are available during the recruitment process to ensure a welcoming experience for everyone.

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Common Interview Questions for Design Engineer - CPU Subsystem
Can you explain your experience with ARM-specific SoCs?

Discuss any relevant projects where you designed or worked with ARM-based SoCs. Emphasize your understanding of ARM architecture, design methodologies, and any specific tools or techniques you used.

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What methodologies do you employ for debugging ASIC/FPGA designs?

Mention specific strategies you have used for debugging, such as simulation-based debugging or hardware validation methods. Provide examples of issues encountered and how your methodologies led to successful resolutions.

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How do you ensure high-quality RTL delivery in your designs?

Discuss your approach to RTL quality checks, possibly using tools like Spyglass. Explain the importance of following coding standards and performing thorough reviews with team members before submission.

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Describe your experience with interrupt distribution in multi-core CPU designs.

Explain how you have managed interrupt handling and distribution in previous projects, detailing your understanding of how it impacts system performance and responsiveness.

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Have you been involved in creating Micro-Architecture documentation? Can you elaborate?

Share examples where you developed Micro-Architecture documents, highlighting how they guided your design process. Discuss the importance of thorough documentation in facilitating team collaboration.

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How do you integrate configured RTL into a larger subsystem?

Describe specific integration processes you’ve used, including any challenges you faced and how you collaborated with different teams to achieve seamless integration in your workflows.

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What tools do you utilize for synthesis and implementation?

Discuss the specific EDA tools you're proficient with for synthesis, implementation, and timing analysis. Highlight any instances where your tool choices improved performance or efficiency.

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How do you collaborate with DV engineers during the design process?

Explain the importance of collaboration with DV engineers and provide examples of how this teamwork has enhanced the verification process in your projects.

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Can you give an example of a challenging SoC design problem you faced and how you solved it?

Describe a specific challenge, your thought process in tackling it, and the steps you took to arrive at a successful solution. Highlight your problem-solving skills and technical expertise.

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What are your long-term career goals as a Design Engineer?

Discuss how this position fits into your career aspirations. Emphasize your desire for continued growth, learning, and contribution to innovative projects in the semiconductor field.

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March 29, 2025

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