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SOC/IP RTL Design Engineer Lead

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Job Details:

Job Description:

The Client Development Group (CDG) is looking for a highly motivated SOC/IP RTL Design Engineer Lead to join the client SOC frontend design and integration team for the next generation of Client SOC.
In this role, the candidate's responsibilities include, although not limited to:Understand IP and SOC arch/urach requirements for building client SOC, understand the global flows like clock, power delivery, design for debug (DFD) etc.
Familiar with IP/SOC design tools, flows and methodology.
Familiar with all aspects of the SoC/IP design flow from high-level design to synthesis, timing and power to create a design database that is ready for manufacturing.
Have thorough understanding of design quality requirements for delivering a robust and scalable IP.
Perform integration of functional units and subsystems into SoC full chip.
Have good understanding of uarch concepts and RTL coding.
Run, analyse and fix various quality check tools and flows such as CDC, lint, VCLP, etc.
Define power domains using UPF and hit performance, power and area targets.
Work with backend engineers on pre and post physical design timing closure.
Work with verification engineering to debug test cases in RTL and Gate Level simulation environment.
Work with cross-functional teams to make sure designs are delivered on time, and with highest quality, by incorporating proper checks at every stage of the design process.
As a lead, set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees.

Qualifications:

Bachelor's in Electrical/ Computer Engineering, Computer Science or related field plus 8+ years of relevant experience. OR a Master's degree in Electrical/Computer Engineering, Computer Science or related field with 6+years of relevant experience. ( Years of Experience updated)

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Average salary estimate

$135000 / YEARLY (est.)

min

max

$120000K

$150000K

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What You Should Know About SOC/IP RTL Design Engineer Lead, Intel

Are you ready to take charge as a SOC/IP RTL Design Engineer Lead with our exciting team in Bangalore, India? At Intel, we’re on the lookout for an innovative engineer to join our Client Development Group (CDG), spearheading the design and integration of the next generation of Client SOCs. In this dynamic role, you will be responsible for understanding the intricate requirements of IP and SOC architecture while managing global flows such as clock, power delivery, and design for debug. You will have hands-on experience with IP/SOC design tools and methodologies, and you will guide your team through high-level design to synthesis and timing analysis, ensuring everything is set for manufacturing. Your expertise in defining power domains using UPF while hitting performance targets will be crucial, along with your collaboration with backend engineers for timing closure and with verification engineers to resolve test cases. As a leader, you'll set priorities, foster an inclusive environment, and mentor your team to deliver exceptional results. Holding a Bachelor's in Electrical/Computer Engineering or a related field paired with significant industry experience, you are poised to drive innovation at Intel, contributing to our mission of enhancing lives through technology. Join us, and let's push the frontiers of computing together!

Frequently Asked Questions (FAQs) for SOC/IP RTL Design Engineer Lead Role at Intel

What are the primary responsibilities of a SOC/IP RTL Design Engineer Lead at Intel?

As a SOC/IP RTL Design Engineer Lead at Intel, your primary responsibilities include understanding the requirements for SOC architecture and integrating different functional units into full chip designs. You will oversee the entire design flow from high-level design to simulation, ensuring quality checks through tools like CDC, lint, and VCLP. You'll also interact with cross-functional teams to ensure on-time project delivery and develop your team members to achieve their best.