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At Tenstorrent, we’re at the forefront of transforming AI technology, and we’re on the lookout for a talented RTL Design Engineer (Contractor) to join our innovative AI core design and verification team. Based out of Santa Clara, Austin, or Toronto, you'll be an integral part of a dynamic environment that’s shaping the future of high-performance AI computing. You’ll take the lead in architecting and developing amazing solutions by diving into RTL methodology development that spans linting to power analysis. Your expertise will help us integrate cutting-edge EDA tools and automate workflows to enhance our design processes. Collaboration is key here, as you’ll work closely with our enthusiastic teams to establish best practices and optimize design metrics in the RTL code. With a solid background of 5+ years in ASIC design, proficiency in Verilog and SystemVerilog, and a knack for problem-solving, you’ll find yourself thriving in this role. Plus, your skills in scripting languages like Tcl and Python are the icing on the cake! Join us, and harness your passion for AI in a company that values curiosity, teamwork, and the relentless pursuit of excellence. If you're ready to embrace challenging problems and contribute to our mission of building the best AI platform, we can’t wait to welcome you aboard!
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